Objective → Result snapshots of the design: inputs, logic, safety, hardware, validation, and go‑to‑market fit.
Prepared
Aug 11, 2025
Core Goal Inputs State Machine Safety Hardware Testing Comms Product Fit
Core Goal
ObjectiveDeliver a safe, reliable, and repairable controller for classic swaps and retrofits.ResultFPGA‑centric architecture with LUT‑driven shift logic and modular, serviceable I/O.
MVP Inputs
ObjectiveMinimize complexity while enabling functional shifting in prototypes.ResultPrimary sensors: MAP via SPI/I2C and VSS (≈40 pulses/shaft rev). RPM input path identified for over‑rev protection.
ObjectiveSurvive automotive electrical abuse and be field‑repairable.ResultTVS on power/VSS/tach; protected digital bus for MAP; replaceable I/O submodules; harness‑friendly pinout.
Testing & Validation
ObjectiveProve logic robustly before road testing.ResultDual Pico2‑ICE (driver/DUT) with synthetic sweeps and bench host; >2M automated test points exercised to date. (51 complete scans)
Data & Debug Tooling
ObjectiveSurface logic mismatches quickly and visually.ResultJSONL logs parsed to 256×256 inspectors and mismatch heatmaps; Python pipeline for .npy→.hex generation.
Comms Robustness
ObjectiveEliminate serial and framing‑related faults.ResultHost‑side buffering and firmware input sanitation in place; framed protocol with checksum/CRC designed and staged for integration.
Product Strategy
ObjectiveShip something people can trust—and fix.ResultRepairable architecture; web portal for feature requests; focus on C10 retrofit niche; roadmap to CAN‑out and Sport Mode.
Roadmap — Next Up
Integrate RPM input on bench & road; finalize over‑rev guards.
Finalize CRC/framing and command parser hardening.
Add explicit SHIFT_IN_PROGRESS state & lockout logic.